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Tag: combinational logic

Building a Full Adder Using NPN Transistors

Building upon the last two posts where I showed how to build NAND, NOR, AND, OR, NOT and XOR gates using NPN transistors, this post will show how these gates can be used to build a full adder. A full adder is one of the circuits used in an Arithmetic and Logic Unit (ALU) which a central component in a microprocessor. The screenshot below shows the full adder circuit using combinational logic running in Circuit Simulator.

Full Adder Circuit Using Combinational Logic

The next screen shot shows the same full adder circuit built using NPN transistors.

Full Adder Circuit Using NPN Transistors

As always, the code for the circuit can be found here. Just copy and import the code into the free Java Circuit Simulator to get a feeling for the circuit.

Building An XOR Gate Using NPN Transistors

Following on from my last post on building logic gates from NPN transistors, I’ve now designed the XOR gate needed to build our Full Adder. As can be seen in the screen shot below, the top circuit shows an XOR gate built using 4 NAND gates and the second circuit shows the same XOR circuit built using 8 NPN transistors.

XOR Gate Built Using NPN Transistors

As Always, copy and paste the following code into the free Java Circuit Simulator to get a feeling for the design.

$ 1 5.0E-6 1.500424758475255 50 5.0 50
151 432 160 544 160 0 2 5.0
151 544 112 656 112 0 2 5.0
151 544 208 656 208 0 2 0.0
w 544 160 544 192 0
w 544 160 544 128 0
151 656 160 768 160 0 2 5.0
w 656 112 656 144 0
w 656 176 656 208 0
w 432 96 432 144 0
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w 432 176 432 224 0
w 432 224 544 224 0
M 768 160 816 160 0 2.5
L 432 96 384 96 0 0 false 5.0 0.0
L 432 224 384 224 0 1 false 5.0 0.0
x 302 51 840 57 0 24 XOR Using Combinational Logic (NAND Gates)
x 284 341 866 347 0 24 XOR Using Combinational Logic (NPN Transistors)
R 320 576 288 576 0 0 40.0 5.0 0.0 0.0 0.5
R 320 624 288 624 0 0 40.0 5.0 0.0 0.0 0.5
t 448 576 480 576 0 1 -4.769244679759966 0.09853954879251582 100.0
t 448 624 480 624 0 1 0.5721119236721417 0.572360682090304 100.0
w 480 592 480 608 0
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s 320 576 368 576 0 1 false
s 320 624 368 624 0 0 false
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g 480 640 480 656 0
g 368 672 368 688 0
r 368 624 368 672 0 10000.0
w 480 560 512 560 0
w 656 448 688 448 0
r 576 512 576 560 0 10000.0
g 576 560 576 576 0
g 656 528 656 544 0
R 656 400 624 400 0 0 40.0 5.0 0.0 0.0 0.5
r 656 400 656 448 0 100.0
r 576 512 624 512 0 10000.0
r 576 464 624 464 0 10000.0
w 656 480 656 496 0
t 624 512 656 512 0 1 0.5713598382462943 0.5716085966689409 100.0
t 624 464 656 464 0 1 -4.875710385258664 0.09853954878803152 100.0
t 624 688 656 688 0 1 -0.11894285435755281 0.6683177341910094 100.0
t 624 736 656 736 0 1 0.5011262498555432 0.6685976279719069 100.0
w 656 704 656 720 0
r 576 688 624 688 0 10000.0
r 576 736 624 736 0 10000.0
r 656 624 656 672 0 100.0
R 656 624 624 624 0 0 40.0 5.0 0.0 0.0 0.5
g 656 752 656 768 0
g 576 784 576 800 0
r 576 736 576 784 0 10000.0
w 656 672 688 672 0
w 512 560 528 560 0
w 528 560 528 512 0
w 528 512 576 512 0
w 528 560 528 688 0
w 528 688 576 688 0
t 784 576 816 576 0 1 0.554942286102126 0.6083225786232598 100.0
t 784 624 816 624 0 1 -1.2089972951264762 0.607048116653794 100.0
w 816 592 816 608 0
r 736 576 784 576 0 10000.0
r 736 624 784 624 0 10000.0
r 816 512 816 560 0 100.0
R 816 512 784 512 0 0 40.0 5.0 0.0 0.0 0.5
g 816 640 816 656 0
g 736 672 736 688 0
r 736 624 736 672 0 10000.0
w 688 448 688 576 0
w 688 576 736 576 0
w 688 672 688 624 0
w 688 624 736 624 0
162 864 560 864 640 1 2.1024259 1.0 0.0 0.0
w 816 560 864 560 0
w 864 640 816 640 0
w 400 464 400 576 0
w 400 464 576 464 0
w 400 624 400 736 0
w 576 736 400 736 0
w 368 624 400 624 0
w 368 576 400 576 0

Building Logic Gates Using Transistors

Moving on from the NOT gate we built using a single transistor and described in a previous post, I decided to show my son how to build more complex logic gates and ultimately much more complex combinational logic circuits using transistors; which is the basis of all modern computers including the one you are using right now to read this blog. The video attached below from Make is a great overview to the transistor, but I would also suggest performing some simple experiments with NPN transistors before moving onto combinational logic.

[youtube=http://www.youtube.com/watch?v=-td7YT-Pums&feature=related]

The circuits below for the gates NAND, NOR, AND, OR and NOT have been designed using NPN transistors and these circuits will be the basis of the Full Adder which we intend to build using them; please note that these circuits may not be the most efficient as I designed them just for fun. In the screen shot you will also see the symbol for each of these gates and if you are unfamiliar with them and their truth tables, I suggest taking a look at the wikipedia article for each.

NAND, NOR, AND, OR and NOT Gates Using NPN Transistors

In order to get a feeling for how they work, I would recommend getting a copy of the excellent and free Java Circuit simulator and importing the following code into the program.

$ 1 5.0E-6 10.20027730826997 50 5.0 50
t 304 176 352 176 0 1 0.5607262480623159 0.6439221594808273 100.0
t 304 224 352 224 0 1 0.5610808902467164 0.6446279101012331 100.0
w 352 192 352 208 0
g 352 240 352 272 0
r 304 224 240 224 0 10000.0
r 304 176 240 176 0 10000.0
R 176 176 128 176 0 0 40.0 5.0 0.0 0.0 0.5
s 176 176 240 176 0 0 false
s 176 224 240 224 0 0 false
w 176 224 176 176 0
w 176 176 176 128 0
w 176 112 352 112 0
162 352 160 400 160 1 2.1024259 1.0 0.0 0.0
w 400 160 400 240 0
r 352 160 352 112 0 330.0
w 176 112 176 128 0
x 242 86 313 92 0 24 NAND
t 560 720 592 720 0 1 -1.7015314369328909 0.0985395491791375 100.0
R 416 720 368 720 0 0 40.0 5.0 0.0 0.0 0.5
s 416 720 480 720 0 1 false
r 480 720 544 720 0 10000.0
w 544 720 560 720 0
r 592 704 592 656 0 330.0
w 592 656 416 656 0
162 592 704 640 704 1 2.1024259 1.0 0.0 0.0
g 592 736 592 768 0
x 489 626 541 632 0 24 NOT
w 416 656 416 720 0
w 640 704 640 736 0
w 176 416 176 432 0
r 352 464 352 416 0 330.0
w 176 416 352 416 0
w 176 480 176 432 0
w 176 528 176 480 0
s 176 528 240 528 0 0 false
s 176 480 240 480 0 0 false
R 176 480 128 480 0 0 40.0 5.0 0.0 0.0 0.5
r 304 480 240 480 0 10000.0
r 304 528 240 528 0 10000.0
g 352 544 352 576 0
w 352 496 352 512 0
t 304 528 352 528 0 1 0.5610808902472575 0.6446279101002914 100.0
t 304 480 352 480 0 1 0.5607262480628803 0.6439221594798585 100.0
w 448 448 448 480 0
162 400 448 448 448 1 2.1024259 1.0 0.0 0.0
t 352 464 384 464 0 1 -1.6333280543612416 0.1667429312700123 100.0
w 592 736 640 736 0
w 352 240 400 240 0
w 400 480 448 480 0
r 352 416 400 416 0 330.0
w 400 416 400 448 0
w 384 448 400 448 0
w 384 480 400 480 0
x 255 369 308 375 0 24 AND
w 832 240 880 240 0
x 685 85 737 91 0 24 NOR
w 608 112 608 128 0
r 784 160 784 112 0 330.0
w 880 160 880 240 0
162 832 160 880 160 1 2.1024259 1.0 0.0 0.0
w 608 112 784 112 0
w 608 176 608 128 0
w 608 224 608 176 0
s 608 224 672 224 0 0 false
s 608 176 672 176 0 1 false
R 608 176 560 176 0 0 40.0 5.0 0.0 0.0 0.5
r 736 176 672 176 0 10000.0
r 736 224 672 224 0 10000.0
g 784 240 784 272 0
t 736 224 784 224 0 1 0.561235418839239 0.6443539216856129 100.0
t 736 176 784 176 0 1 -0.01047151862990496 0.07264698421646892 100.0
w 784 208 800 208 0
w 784 192 832 192 0
w 784 160 800 160 0
w 800 160 800 208 0
w 832 192 832 240 0
w 832 240 784 240 0
w 800 160 832 160 0
w 384 480 384 544 0
w 384 544 352 544 0
w 800 464 832 464 0
w 832 544 784 544 0
w 832 496 832 544 0
w 800 464 800 512 0
w 784 464 800 464 0
w 784 496 832 496 0
w 784 512 800 512 0
t 736 480 784 480 0 1 -0.010470026008861447 0.07264847683763566 100.0
t 736 528 784 528 0 1 0.561235418839193 0.6443539216856902 100.0
g 784 544 784 576 0
r 736 528 672 528 0 10000.0
r 736 480 672 480 0 10000.0
R 608 480 560 480 0 0 40.0 5.0 0.0 0.0 0.5
s 608 480 672 480 0 1 false
s 608 528 672 528 0 0 false
w 608 528 608 480 0
w 608 480 608 432 0
w 608 416 784 416 0
r 784 464 784 416 0 330.0
w 608 416 608 432 0
x 696 372 730 378 0 24 OR
w 864 544 832 544 0
w 864 480 864 544 0
w 864 480 880 480 0
w 864 448 880 448 0
w 880 416 880 448 0
r 832 416 880 416 0 330.0
w 880 480 928 480 0
t 832 464 864 464 0 1 -1.7169524832810044 0.0831185028464971 100.0
162 880 448 928 448 1 2.1024259 1.0 0.0 0.0
w 928 448 928 480 0
w 784 416 832 416 0
151 336 64 432 64 0 2 5.0
153 768 64 864 64 0 2 5.0
150 336 352 432 352 0 2 0.0
152 768 352 864 352 0 2 0.0
I 560 608 656 608 0 0.5

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